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Gate dielectric

A gate dielectric is a dielectric used between the gate and substrate of a field effect transistor. In state-of-the-art processes, the gate dielectric is subject to many constraints, including:

  • Electrically clean interface to the substrate (low density of quantum states for electrons)
  • High capacitance, to increase the FET transconductance
  • High thickness, to avoid dielectric breakdown and leakage by quantum tunneling.

The capacitance and thickness constraints are almost directly opposed to each other. For silicon-substrate FETs, the gate dielectric is almost always silicon dioxide, since thermal oxide has a very clean interface. However, the semiconductor industry is interested in finding alternative materials with higher dielectric constants, which would allow higher capacitance with the same thickness.

Further information: High-k dielectric
This article is licensed under the GNU Free Documentation License. It uses material from the Wikipedia article "Gate_dielectric". A list of authors is available in Wikipedia.
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