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Silicon on sapphire
Silicon on sapphire (SOS) is a hetero-epitaxial process for integrated circuit manufacturing that consists of a thin layer (typically thinner than 0.6 micrometres) of silicon grown on a sapphire (Al2O3) wafer. SOS is part of the Silicon on Insulator (SOI) family of CMOS technologies. SOS is primarily used in aerospace and military applications because of its inherent resistance to radiation. Typically, high-purity artificially grown sapphire crystals are used. The silicon is usually deposited by the decomposition of silane gas (SiH4) on heated sapphire substrates. The advantage of sapphire is that it is an excellent electrical insulator, preventing stray currents caused by radiation from spreading to nearby circuit elements. SOS has seen little commercial use to date because of difficulties in fabricating the very small transistors used in modern high-density applications. This drawback is because the SOS process results in the formation of dislocations, twinning and stacking faults from crystal lattice disparities between the sapphire and silicon. Additionally, there is some aluminium, a p-type dopant, contamination from the substrate in the silicon closest to the interface.
Additional recommended knowledge
Silicon on Sapphire Circuits and Systems
The physical differences in the fabrication of the SOS devices and the insulating substrate make SOS MOSFETs quite different from a bulk process. While the characteristics of the devices are not significantly different from the devices in a bulk process, the insulating substrate, the floating body and the different thermal properties of the sapphire give rise to characteristics that have to be fully mastered to allow for high-precision design of circuits and systems .
The advantages of the SOS technology allowed research groups as Yale e-Lab to fabricate a variety of SOS circuits and system that benefit from the technology and advance the state-of-the-art in:
Substrate Analysis - SOS Structure
The application of epitaxial growth of silicon on sapphire substrates for fabricating MOS devices involves a silicon purification process that mitigates crystal defects which result from a mismatch between sapphire and silicon lattices. The Peregrine PE42612 SP4T switch is formed on an SOS substrate where the final thickness of silicon is approximately 95nm. Silicon is recessed in regions outside the polysilicon gate stack by poly oxidation and further recessed by the sidewall spacer formation process to a thickness of approximately 78nm.
|This article is licensed under the GNU Free Documentation License. It uses material from the Wikipedia article "Silicon_on_sapphire". A list of authors is available in Wikipedia.