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Radiation hardening



Radiation hardening is a method of designing and testing electronic components and systems to make them resistant to damage or malfunctions caused by high-energy subatomic particles and electromagnetic radiation, such as would be encountered in outer space, high-altitude flight and around nuclear reactors.

Most radiation-hardened chips are based on their commercial equivalents, with some manufacturing and design variations that reduce the susceptibility to interference from Electromagnetic radiation. Due to the extensive development and testing required to produce a radiation-tolerant design of a microelectronic chip, radiation-hardened chips tend to lag behind the cutting-edge of developments.

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Contents

Problems caused by radiation

Environments with high levels of ionizing radiation create special design challenges. A single charged particle can knock thousands of electrons loose, causing electronic noise and signal spikes. In the case of digital circuits, this can cause results which are inaccurate or unintelligible. This is a particularly serious problem in the design of artificial satellites, spacecraft, military aircraft, nuclear power stations, and nuclear weapons. In order to ensure the proper operation of such systems, manufacturers of integrated circuits and sensors intended for the (military) aerospace markets employ various methods of radiation hardening. The resulting systems are said to be rad(iation)-hardened, rad-hard, or (within context) hardened.

Major radiation damage sources

Typical sources of exposure of electronics to ionizing radiation are solar wind and the Van Allen radiation belts for satellites, nuclear reactors in power plants for sensors and control circuits, residual radiation from isotopes in chip packaging materials, cosmic radiation for both high-altitude airplanes and satellites, and nuclear explosions for potentially all military and civilian electronics.

  • Cosmic rays come from all directions and consist of approx. 85% protons, 14% alpha particles, and 1% heavy ions, together with ultraviolet radiation and x-rays. Most effects are caused by particles with energies between 108 and 2*1010 eV, though there are even particles with energies up to 1020 eV. The atmosphere filters most of these, so they are a concern just for high-altitude applications like stratospheric jets and satellites.
  • Solar particle events come from the direction of the sun and consist of a large flux of high-energy (several GeV) protons and heavy ions, again accompanied with UV and x-ray radiation. They cause a scale of problems for satellites, ranging from radiation damage to loss of altitude by heating up the upper regions of the atmosphere, causing them to raise up, and decelerating the low-orbit satellites.
  • Van Allen radiation belts contain electrons (up to about 10 MeV) and protons (up to 100s MeV) trapped in the geomagnetic field. The particle flux in the regions farther from the Earth can vary wildly depending on the actual conditions of the sun and the magnetosphere. Due to their position they pose a concern for satellites.
  • Secondary particles result from interaction of other kinds of radiation with structures around the electronic devices.
  • Nuclear reactors produce gamma radiation and neutron radiation which can affect sensor and control circuits in nuclear power plants.
  • Nuclear explosions produce a short, extremely intense surge of the entire spectrum of electromagnetic radiation, electromagnetic pulse (EMP), neutron radiation, and flux of both primary and secondary charged particles. In case of a nuclear war they pose a potential concern for all civilian and military electronics.
  • Chip packaging materials were an insidious source of radiation that was found to be causing soft errors in new DRAM chips in the 1970s. Traces of radioactive elements in the packaging of the chips were producing alpha particles, which were then occasionally discharging some of the capacitors used to store the DRAM data bits. These effects have been reduced today by using purer packaging materials, and employing ECC codes to detect and often correct DRAM errors.

Radiation effects on electronics

Fundamental mechanisms

Two fundamental damage mechanisms take place:

  • Lattice displacement, caused by neutrons, protons, alpha particles, heavy ions, and very high energy gamma photons. They change the arrangement of the atoms in the lattice, creating lasting damage, and increasing the number of recombination centers, depleting the minority carriers and worsening the analog properties of the affected semiconductor junctions. Counterintuitively, higher doses over short time cause partial annealing ("healing") of the damaged lattice, leading to a lower degree of damage than with the same doses delivered in low intensity over a long time. This type of damage is especially important for bipolar transistors, which are dependent on minority carriers in their base regions; increased losses caused by recombination cause loss of the transistor gain. See neutron effects.
  • Ionization effects are caused by charged particles, including the ones with energy too low to cause lattice effects. The ionization effects are usually transient, creating glitches and soft errors, but can lead to destruction of the device if they trigger other damage mechanisms, eg. a latchup. Photocurrent caused by ultraviolet and x-ray radiation may belong to this category as well. Gradual accumulation of holes in the oxide layer in MOSFET transistors leads to worsening of their performance, up to device failure when the dose is high enough; see total ionizing dose effects.

The effects can vary wildly depending on all the parameters - the type of radiation, total dose and the radiation flux, combination of types of radiation, and even the kind of the device load (operating frequency, operating voltage, actual state of the transistor during the instant it is struck by the particle), which makes thorough testing difficult, time consuming, and requiring a lot of test samples.

Resultant effects

The "end-user" effects can be characterized in several groups:

  • Neutron effects : A neutron interacting with the semiconductor lattice will displace its atoms. This leads to increase of the count of recombination centers and deep-level defects, reducing the lifetime of minority carriers, thus affecting bipolar devices more than CMOS ones. Bipolar devices on silicon tend to show changes in electrical parameters at levels of 1010 to 1011 neutrons/cm², CMOS devices aren't affected until 1015 neutrons/cm². The sensitivity of the devices may increase together with increasing level of integration and decreasing size of individual structures. There is also the risk of induced radioactivity caused by neutron activation, which is a major source of noise in high energy astrophysics instruments. Induced radiation, together with residual radiation from impurities in used materials, can cause all sorts of single-event problems during the device's lifetime. GaAs LEDs, common in optocouplers, are very sensitive to neutrons. Kinetic energy effects (namely lattice displacement) of charged particles belong here too.
  • Total ionizing dose effects : The cumulative damage of the semiconductor lattice (lattice displacement damage) caused by ionizing radiation over the exposition time. It is measured in rads and causes slow gradual degradation of the device's performance; total dose greater than 5000 rads delivered to silicon-based devices in seconds to minutes will cause long-term degradation. In CMOS devices, the radiation creates electron–hole pairs in the gate insulation layers, which cause photocurrents during their recombination, and the holes trapped in the lattice defects in the insulator create a persistent gate bias and influence the transistors' threshold voltage, making the N-type MOSFET transistors easier and the P-type ones more difficult to switch on. The accumulated charge can be high enough to keep the transistors permanently open (or closed), leading to device failure. Some self-healing takes place over time, but this effect is not too significant.
  • Transient dose effects : The short-time high-intensity pulse of radiation, typically occurring during a nuclear explosion. The high radiation flux creates photocurrents in the entire body of the semiconductor, causing transistors to randomly open, changing logical states of flip-flops and memory cells. Permanent damage may occur if the duration of the pulse is too long, or if the pulse causes junction damage or causes a latchup. Latchups are commonly caused by the x-rays and gamma radiation flash of a nuclear explosion.
  • Systems-generated EMP effects (SGEMP) are caused by the radiation flash traveling through the equipment and causing local ionization and electric currents in the material of the chips, circuitboards, cables and cases.
  • Single-event effects (SEE) are phenomena affecting mostly digital devices; see the following section for an overview of the various types of SEE.

Digital damage: SEE

Single-event effects (SEE), mostly affecting only digital devices, were not studied extensively until relatively recently. When a high-energy particle travels through a semiconductor, it leaves an ionized track behind. This ionization may cause a highly localized effect similar to the transient dose one - a benign glitch in output, a less benign bit flip in memory or a register, or, especially in high-power transistors, a destructive latchup and burnout. Single event effects have importance for electronics in satellites, aircraft, and other both civilian and military aerospace applications. Sometimes in circuits not involving latches it is helpful to introduce RC time constant circuits, slowing down the circuit's reaction time beyond the duration of a SEE.

  • Single-event upsets (SEU), or transient radiation effects in electronics, are state changes of memory or register bits caused by a single ion interacting with the chip. They do not cause lasting damage to the device, but may cause lasting problems to a system which cannot recover from such an error. In very sensitive devices, a single ion can cause a multiple-bit upset (MBU) in several adjacent memory cells. SEUs can become Single-event Functional Interrupts (SEFI) when they upset control circuits, such as state machines, placing the device into an undefined state, a test mode, or a halt, which would then need a reset or a power cycle to recover.
  • Single-event latchup (SEL) can occur in any chip with a parasitic PNPN structure. A heavy ion or a high-energy proton passing through one of the two inner-transistor junctions can turn on the thyristor-like structure, which then stays "shorted" (an effect known as latchup) until the device is power-cycled. As the effect can happen between the power source and substrate, destructively high current can be involved and the part may fail. Bulk CMOS devices are most susceptible.
  • Single-event transient (SET) happens when the charge collected from an ionization event discharges in the form of a spurious signal traveling through the circuit. This is de facto the effect of an electrostatic discharge.
  • Single-event snapback, similar to SEL but not requiring the PNPN structure, can be induced in N-channel MOS transistors switching large currents, when an ion hits near the drain junction and causes avalanche multiplication of the charge carriers. The transistor then opens and stays opened.
  • Single-event induced burnout (SEB) may occur in power MOSFETs when the substrate right under the source region gets forward-biased and the drain-source voltage is higher than the breakdown voltage of the parasitic structures. The resulting high current and local overheating then may destroy the device.
  • Single-event gate rupture (SEGR) was observed in power MOSFETs when a heavy ion hits the gate region while a high voltage is applied to the gate. A local breakdown then happens in the insulating layer of silicon dioxide, causing local overheat and destruction (looking like a microscopic explosion) of the gate region. It can occur even in EEPROM cells during write or erase, when the cells are subjected to a comparatively high voltage.

Radiation-hardening techniques

  • Physical:
    • Hardened chips are often manufactured on insulating substrates instead of the usual semiconductor wafers. Silicon oxide (SOI) and sapphire (SOS) are commonly used. While normal commercial-grade chips can withstand between 5 and 10 krad, space-grade SOI and SOS chips can survive doses many orders of magnitude greater.
    • Shielding the package against radioactivity, to reduce exposure of the bare device.
    • Capacitor-based DRAM is often replaced by more rugged (but larger, and more expensive) SRAM.
    • Choice of substrate with wide band gap, which gives it higher tolerance to deep-level defects; eg. silicon carbide or gallium nitride.
    • Shielding the chips themselves by use of depleted boron (consisting only of isotope Boron-11) in the borophosphosilicate glass layer protecting the chips, as boron-10 readily captures neutrons and undergoes alpha decay (see soft error).
  • Logical:
    • Error correcting memory uses additional parity bits to check for and possibly correct corrupted data. Since radiation effects damage the memory content even when the system is not accessing the RAM, a "scrubber" circuit must continuously sweep the RAM; reading out the data, checking the parity for data errors, then writing back any corrections to the RAM.
    • Redundant elements can be used at the system level. Three separate microprocessor boards may independently compute an answer to a calculation and compare their answers. Any system that produces a minority result will recalculate. Logic may be added such that if repeated errors occur from the same system, that board is shut down.
    • Redundant elements may be used at the circuit level. A single bit may be replaced with three bits and separate "voting logic" for each bit to continuously determine its result. This increases area of a chip design by a factor of 5, so must be reserved for smaller designs. But it has the secondary advantage of also being "fail-safe" in real time. In the event of a single-bit failure (which may be unrelated to radiation), the voting logic will continue to produce the correct result without resorting to a watchdog timer. System level voting between three separate processor systems will generally need to use some circuit-level voting logic to perform the votes between the three processor systems.
    • Watchdog timer will perform a hard reset of a system unless some sequence is performed that generally indicates the system is alive, such as a write operation from an onboard processor. During normal operation, software schedules a write to the watchdog timer at regular intervals to prevent the timer from running out. If radiation causes the processor to operate incorrectly, it is unlikely the software will work correctly enough to clear the watchdog timer. The watchdog eventually times out and forces a hard reset to the system. This is considered a last resort to other methods of radiation hardening.

Nuclear hardness for telcommunication

In telecommunication, the term nuclear hardness has the following meanings:

  1. An expression of the extent to which the performance of a system, facility, or device is expected to degrade in a given nuclear environment.
  2. The physical attributes of a system or electronic component that will allow survival in an environment that includes nuclear radiation and electromagnetic impulses (EMI).

Notes

  1. Nuclear hardness may be expressed in terms of either susceptibility or vulnerability.
  2. The extent of expected performance degradation (e.g., outage time, data lost, and equipment damage) must be defined or specified. The environment (e.g., radiation levels, overpressure, peak velocities, energy absorbed, and electrical stress) must be defined or specified.
  3. The physical attributes of a system or component that will allow a defined degree of survivability in a given environment created by a nuclear weapon.
  4. Nuclear hardness is determined for specified or actual quantified environmental conditions and physical parameters, such as peak radiation levels, overpressure, velocities, energy absorbed, and electrical stress. It is achieved through design specifications and is verified by test and analysis techniques.

References

  • Federal Standard 1037C (link)

Examples of rad-hard computers

  • Broad Reach Engineering BRE440 PowerPC System On A Chip. This is an IBM PPC440 Core Based Chip manufactured on Honeywell's HX5000 150nm rad-hard process. Available in early 2008, the device is rated at 300kRad to 1MRad, 200MHz nominal clock, 400MIPS, includes PCI, Ethernet, DDRAM interfaces on chip.[1]
  • The Proton 200k SBC by Space Micro Inc., introduced in 2004, is the successor to the Space Micro Proton 100k. The Proton 200k mitigated SEU with its proprietary TTMR Technology, and, SEFI with H-Core Technology. The processor is the high speed Texas Instrument DSP.
  • The Proton 100k SBC by Space Micro Inc., introduced in 2003, uses an updated voting scheme called Time-Triple Modular Redundancy (TTMR) which mitigates SEU without using the three processors in the older Triple Modular Redundancy(TMR)technology. The TTMR Technology uses voting within the same commercially available processor.
  • The RCA1802 8-bit CPU, introduced in 1976, was the first serially-produced radiation-hardened microprocessor.
  • The System/4 Pi, made by IBM and used onboard the Space Shuttle (AP-101 variant), is based on the System/360 architecture.
  • The RAD6000 single board computer (SBC), produced by BAE Systems, includes a rad-hard IBM POWER-architecture CPU.
  • The RAD750 SBC, also produced by BAE Systems, and based on the PowerPC 750 processor, is the successor to the RAD6000.
  • The U.S. DOE Sandia National Laboratories manufactures a rad-hard variant of the Intel Pentium.
  • The RH32 is produced by Honeywell Aerospace.
  • The RHPPC is produced by Honeywell Aerospace. Based on hardened PowerPC 603e.
  • The SCS750 built by Maxwell Technologies, which votes three PowerPC 750 cores against each other to mitigate radiation effects.
  • The Boeing Company, through its Satellite Development Center, produces a very powerful radiation hardened space computer variant based on the PowerPC 750.
  • The ERC32 and LEON are radiation hardened processors designed by Gaisler Research and the European Space Agency. They are described in synthesizable VHDL available under the GNU Lesser General Public License and GNU General Public License respectively.
  • The RH1750 processor is manufactured by GEC-Plessey.
  • The Coldfire M5208 used by General Dynamics is a low power (1.5 Watt) radiation hardened alternative.

See also

  • Soft error
  • Communications survivability
  • Mars Reconnaissance Orbiter
  • MESSENGER Mercury probe
  • Mars rovers
  • Electromagnetic pulse hardening (see TEMPEST and Faraday cage)
 
This article is licensed under the GNU Free Documentation License. It uses material from the Wikipedia article "Radiation_hardening". A list of authors is available in Wikipedia.
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