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Depletion region

In semiconductor physics, the depletion region, also called depletion layer, depletion zone, junction region or the space charge region, is an insulating region within a conductive, doped semiconductor material where the charge carriers have diffused away, or have been pushed away by an electric field.

The depletion region is so named because it is formed from a conducting region by removal of all free charge carriers, leaving none to carry a current. Understanding the depletion region is key to explaining modern semiconductor electronics: the operation of diodes, bipolar junction transistors, field-effect transistors, and variable capacitance diodes rely on depletion region phenomena.

The following discussion is limited to the pn junction and the MOS capacitor, but depletion regions arise in all the devices mentioned above.


Formation of depletion region in a pn junction


A depletion region forms spontaneously across a P-N junction, and is most easily described when the junction is in thermal equilibrium or more specifically, in dynamic equilibrium.[1] , [2] Electrons and holes will diffuse into regions with lower concentrations of electrons and holes, much as ink will diffuse into water until it is uniformly distributed throughout. N-type semiconductor has an excess of free electrons compared to the P-type region, and P-type has an excess of holes compared to the N-type region. Therefore when N-doped and P-doped pieces of semiconductor are placed together to form a junction, electrons will diffuse into the P-side and holes will diffuse into the N-side. Departure of an electron on the N-side for the P-side leaves a positive donor ion behind on the N-side, and likewise the hole leaves a negative acceptor ion on the P-side. Following transfer, the injected electrons come into contact with holes on the P-side and are eliminated by recombination. Likewise for the injected holes on the N-side. The net result is the injected electrons and holes are gone, leaving behind the charged ions adjacent to the interface in a region with no mobile carriers (the depletion region). The exposed ions are positive on the N side and negative on the P side, creating an electric field that counteracts the continued diffusion of charge carriers. When the electric field is sufficient to arrest further transfer of holes and electrons, the depletion region reaches its equilibrium dimensions. Integrating the electric field across the depletion region determines what is called the built-in voltage (also called the junction voltage or barrier voltage or contact potential).

Conduction in semiconductor devices is a combination of charge driven by electric field (drift) and by diffusion. The current density is then
j = σ E - D ∇qp
with q the elementary charge and p the hole density. Diffusion moves the carriers in the direction of decreasing concentration, so for holes a negative current results for a positive density gradient. (If the carriers are electrons, replace hole density p by the negative of the electron density n). When the two current components balance, as in the pn-junction depletion region at dynamic equilibrium, the current is zero due to the Einstein relation, which relates D to σ.

Under reverse bias (P negative with respect to N), the potential drop across the depletion region increases, widening the depletion region and increasing the drift component of current while decreasing the diffusion component. Carrier density is small and only a very small reverse saturation current flows. Forward bias (P positive with respect to N) narrows the depletion region and lowers the barrier to carrier injection. Diffusion component of current greatly increases and drift component decreases. Carrier density is large (exponential), making the junction conductive and allowing a large forward current.[3] The mathematical description of the current is provided by the Shockley diode equation. The low current conducted under reverse bias and large current under forward bias is an example of rectification.

Formation of depletion region in an MOS capacitor

  Another example is the MOS capacitor shown in the figure at right. The figure shows a P-type substrate. Initially, suppose the semiconductor is charge neutral, with the charge due to holes exactly balanced by the negative charge due to acceptor doping impurities. If now a positive voltage is applied to the gate, which is done by introducing positive charge on the gate, some positively charged holes in the semiconductor region nearest the gate are repelled by the positive charge on the gate, and leave the device through the bottom contact. When these holes leave, they leave behind a depleted region that is insulating because no mobile holes are left there, only the immobile, negatively charged acceptor impurities. The more positive charge that is placed upon the gate, the more positive the applied gate voltage becomes, and the more holes must leave the semiconductor surface, making the depletion region wider. (In this device there is a limit to how wide the depletion width may become that is set by the onset of an inversion layer of carriers in a thin layer or channel near the surface. The above discussion applies for voltages low enough that an inversion layer does not form.)

If the gate material is polysilicon of opposite type to the body region, a spontaneous depletion region forms if the gate is electrically shorted to the substrate, in much the same manner as described for the pn-junction above.

Depletion width

Depletion width describes the width of the depletion region in a semiconductor, particularly in geometries that are one-dimensional, like the pn-junction and MOS capacitor. The width of the depletion region is governed by the principle of charge neutrality. Two examples follow:

Depletion width in pn-junction

The principle of charge neutrality in this case relates the depletion width wP in the p-region with acceptor doping NA to the depletion width wN in the n-region with donor doping ND:

qNAwP = qNDwN.

This condition insures that the net negative acceptor charge exactly balances the net positive donor charge. The total depletion width in this case is the sum w = wN + wP.

Depletion width in MOS capacitor

Again, the governing principle is charge neutrality. Let us assume a P-type substrate. If positive charge Q is placed on the gate, then holes are depleted to a depth w sufficient to expose sufficient negative acceptors to exactly balance the gate charge. Supposing the dopant density to be NA acceptors per unit volume, then charge neutrality requires the depletion width w to satisfy the relationship:

Q = qNAw

If the depletion width becomes wide enough in this case, electrons appear in a very thin layer at the semiconductor-oxide interface, called an inversion layer because they are oppositely charged to the holes that prevail in a P-type material. In this case, when an inversion layer forms the depletion width ceases to expand with increase in gate charge Q, and neutrality is achieved by attracting more electrons into the inversion layer instead. In the MOSFET this inversion layer is referred to as the channel.

See also

  • Capacitance voltage profiling
  • Metal–oxide–semiconductor structure
  • Semiconductor diodes


  1. ^ Robert H. Bishop (2002). The Mechatronics Handbook. CRC Press. ISBN 0849300665. 
  2. ^ John E. Ayers (2003). Digital Integrated Circuits: Analysis and Design. CRC Press. ISBN 084931951X. 
  3. ^ Sung-Mo Kang and Yusuf Leblebici (2002). CMOS Digital Integrated Circuits Analysis & Design. McGraw–Hill Professional. ISBN 0072460539. 
This article is licensed under the GNU Free Documentation License. It uses material from the Wikipedia article "Depletion_region". A list of authors is available in Wikipedia.
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