Wacker Honors Researchers for the Development of a new Process for Manufacturing Ultra-Flat Silicon Wafers
“Planetary Pad Grinding is an important step toward meeting Siltronic customers’ demand for silicon wafers of even higher quality for future device generations,” said CEO Rudolf Staudigl in his speech. “Thanks to our employees’ creativity, the new process has further strengthened our position as a technological leader in the semiconductor sector.”
According to Moore’s Law, the efficiency of semiconductor devices doubles approximately every two years. Among the key performance-boosting parameters are the design rules achieved on a silicon wafer. They determine how many transistors fit on a device per square centimeter.
Today, the semiconductor industry’s standard design rules are 45 and 32 nanometers. In the coming years, they are expected to decrease to 22 and 16 nanometers. Key manufacturing steps are planarization processes. They must be fundamentally enhanced for silicon wafers with 16-nanometer design rules. Protected by numerous Siltronic patents and patent applications, the new PPG process has already shown its capabilities in test wafer runs, with high yields at competitive costs. PPG has also proven suitable for developing 450 millimeter wafers.
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